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Transaction-level modeling port, export, and imp roles

EasyUVM ComponentsSystemVerilog

Which description of UVM transaction-level modeling (TLM) connection roles is accurate?

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Answer choices

  1. A. A port initiates interface calls, an export forwards an implementation through hierarchy, and an imp terminates the connection at implementing methods
  2. B. An imp initiates calls, a port stores transactions, and an export randomizes them
  3. C. Ports and exports are components, while imps are sequence items
  4. D. All three are interchangeable aliases with no direction or implementation role
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