Skip to question
asic.fyi
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
asic.fyi/Interview questions/Report verbosity and severity

Hardware interview practice

Report verbosity and severity

EasyUVM ComponentsSystemVerilog

A component's verbosity is lowered to UVM_NONE, yet UVM_ERROR reports are still displayed. Why is this expected?

Try it in the question bankReason first. Then compare.

Keep this exact question selected while you check your answer and review the full solution.

Practice this question →
Choose one

Answer choices

  1. A. UVM_NONE is numerically the highest verbosity
  2. B. Verbosity filtering primarily applies to UVM_INFO; error visibility is controlled by severity/ID actions and report configuration
  3. C. Errors bypass the report server and are printed by the simulator
  4. D. Only sequence objects can change report verbosity
Continue practicing

Related questions

UVM ComponentsUVM callbacks→UVM ComponentsReport catchers→
asic.fyi · Learn silicon end to end.info@asic.fyi