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Hardware interview practice

Recognize a safe asynchronous-FIFO pointer scheme

MediumClock and Reset DomainsSystemVerilog

A depth-16 FIFO has unrelated write and read clocks and uses five-bit pointers including a wrap bit. Which architecture is correct?

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Answer choices

  1. A. Keep local binary pointers for addressing, register their Gray forms, synchronize each Gray bus through destination flops, compare next read Gray directly for empty, and compare next write Gray with the synchronized read Gray's top two bits inverted for full.
  2. B. Synchronize each five-bit binary pointer independently and compare the synchronized binary value for full and empty.
  3. C. Declare all pointer paths false and infer full whenever the four address bits match, ignoring the wrap bit.
  4. D. Send the write clock into the read domain and use it to sample the read pointer so no Gray conversion is needed.
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