Hardware interview practice
Quarantine traffic after peer reset
A local interface sees an already synchronized peer_reset_ok signal. It must wait for two consecutive high samples before accepting traffic after any peer reset. Implement the local reset-quarantine logic in SystemVerilog.
Starting point
Question code
input logic clk, rst_n, peer_reset_ok;
input logic in_valid;
output logic in_ready, quarantined;Reviewed example
Work through one case
Input
After local reset, sample peer_reset_ok high on two consecutive rising edges.Expected output
in_ready remains 0 after the first high sample and becomes 1 after the second.The quarantine releases only when the two-sample recovery counter observes uninterrupted peer readiness.
What to cover
Requirements
- When rst_n=0 at an edge, set quarantined=1, clear the high-sample count, and drive in_ready=0.
- While peer_reset_ok=0, remain quarantined and clear the high-sample count.
- Leave quarantine only after peer_reset_ok has been high on two consecutive rising edges.
- Set in_ready=!quarantined. During a stall (in_valid && !in_ready), accept nothing; in_valid cannot change quarantine state.