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P_sequencer type coupling

MediumUVM ComponentsSystemVerilog

A virtual sequence declares p_sequencer as sys_vseqr, but a test accidentally starts it on a bus_sequencer. What is the expected failure mode?

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Question code

class sys_vseq extends uvm_sequence;
  `uvm_declare_p_sequencer(sys_vseqr)
  // body uses p_sequencer.bus_sqr
endclass
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Answer choices

  1. A. UVM automatically creates a sys_vseqr adapter around bus_sequencer
  2. B. The macro's sequencer cast fails, normally producing a fatal before body can safely use p_sequencer
  3. C. The virtual sequence silently runs with p_sequencer set to null and all child sequences succeed
  4. D. The factory replaces bus_sequencer with sys_vseqr after start returns
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