Hardware interview practice
Choose one-hot or binary FSM encoding
A 12-state high-performance field-programmable gate array (FPGA) controller can use four binary state bits or twelve one-hot bits. Choose an encoding, implement a one-hot state ring, and explain the timing and area tradeoffs rather than judging only flip-flop count.
Reviewed example
Work through one case
Input
12-bit one-hot state=12'b0000_0000_0001; step=1; then inject illegal state=12'b0000_0000_0011Expected output
normal step produces 12'b0000_0000_0010; illegal state asserts error and recovers to SAFE 12'b0000_0000_0001 on the next edgeOne-hot uses more flops than four-bit binary but can reduce LUT decode depth; illegal zero/multi-hot states take the explicit safe default.
What to cover
Requirements
- Use exactly one state bit in normal operation and provide a safe default recovery state.
- Advance one state per asserted step and otherwise hold state.
- Explain why one-hot can reduce decode depth and fan-in on lookup-table (LUT) based fabrics.
- Acknowledge that synthesis results, routing, power, and device architecture can change the best choice.