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ASIC.FYI

Q120FreeSystemVerilog

Build a behavioral synchronous FIFO model

Difficulty
Medium
Topic
Reference Models
Language
SV
Interview prompt

Question

Implement a bounded behavioral model of a synchronous hardware FIFO that tracks occupancy and read/write pointer movement and reports illegal pushes or pops.

Starting point

Question code

class FifoModel;
  function new(int depth);
  function bit push();
  function bit pop();
  function bit push_and_pop();
  function int occupancy();
  function bit is_full();
  function bit is_empty();
endclass
Reviewed example

Trace one case

Input
DEPTH=2; while empty call push_and_pop(); call push(); call push(); while nonempty call push_and_pop()
Expected output
empty bypass succeeds with count=0 and both pointers unchanged; two pushes produce count=2/full; final simultaneous operation keeps count=2 and advances both pointers once

The behavioral model tracks only occupancy and pointer movement, distinguishing an empty bypass from a simultaneous operation on stored entries.

What to cover

Requirements

  1. Require a fixed positive depth.
  2. Reject a push on full and a pop on empty.
  3. Track occupancy, write pointer, and read pointer.
  4. Expose full and empty state.
  5. Support one simultaneous push and pop with unchanged occupancy.
  6. Treat simultaneous push and pop on empty as a legal same-cycle bypass with no stored entry or pointer movement.
Continue practicing
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