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Q070FreeDesign Verification

AXI Write Response Is Issued Too Early

Difficulty
Medium
Topic
Waveform Debugging
Language
SV
Interview prompt

Question

Each column shows one rising clock edge. The address handshakes at C1, but the write data does not handshake until C4 because WREADY is low earlier. BVALID may be asserted only after both handshakes have occurred. What is wrong at C3?

Waveform for AXI Write Response Is Issued Too Early. Signals: AWVALID, AWREADY, WVALID, WREADY, BVALID. Numbered markers identify sampled columns.
Read the sampled columns from left to right, then test each choice against the stated timing rule.
Choose one

Answer choices

  1. A. The address is accepted before the data.
  2. B. BVALID rises before the write-data handshake.
  3. C. WVALID remains high while WREADY is low.
  4. D. AWREADY is high in idle cycles.
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