Vote across redundant state monitors

module redundant_state_voter #(
  parameter int unsigned CODE_W = 4
) (
  input  logic              clk,
  input  logic              rst_n,
  input  logic              check,
  input  logic [CODE_W-1:0] code [0:4],
  output logic              done,
  output logic              majority_valid,
  output logic [CODE_W-1:0] majority_code
);
  logic majority_valid_next;
  logic [CODE_W-1:0] majority_code_next;
  logic check_q;

  always_comb begin : vote_whole_codes
    // TODO: Initialize the majority outputs for the no-winner case.
    for (int unsigned i = 0; i < 5; i++) begin
      int unsigned match_count;
      // TODO: Count complete-code matches for candidate i and select the first strict majority.
    end
  end

  always_ff @(posedge clk) begin : sample_check_edge
    // TODO: Implement sample_check_edge using the supplied state and interface.
  end
endmodule