Q106FreeDesign Verification
Verify a framed cache-line rotator
Question
Write a frame oracle and core output properties for a streaming cache-line rotator that samples count and right-shift metadata on the first accepted beat. W is positive. The oracle receives queues of known data and marker values collected only on accepted input beats; count and shift are unsigned metadata from the first accepted beat. Counts 1 through 16 are legal nonempty frames. Count zero still has one accepted descriptor beat with first=1 and last=1; its data is ignored. Use error codes 1=bad-first, 2=oversized-count, 3=early-last, and 4=late/extra, in that priority order when a frame has multiple faults; success uses code zero. Missing or repeated first markers are bad-first. The three queues must describe the same beats. After a nonfinal output beat is accepted, the next beat must be valid at the next rising edge. Reset is sampled at rising edges for the supplied output properties.
Implementation scaffold
class rotate_oracle #(int W = 32);
typedef bit [W-1:0] word_t;
function new();
if(W<1)$fatal(1,"W must be positive");
endfunction
typedef struct {
word_t words[$];
bit error;
bit [2:0] error_code;
} prediction_t;
function automatic prediction_t predict(
word_t data_q[$], bit first_q[$], bit last_q[$],
int unsigned count, int unsigned shift);
// TODO: Implement this oracle or scoreboard method.
endfunction
endclass
module rotate_protocol_checker #(int W=32)(
input logic clk,rst_n,out_valid,out_ready,
input logic [W-1:0]out_data,
input logic out_first,out_last,out_error,
input logic [2:0]out_error_code
);
property p_output_stable_while_stalled;
// TODO: Implement this named temporal obligation.
endproperty
property p_no_internal_output_gap;
// TODO: Implement this named temporal obligation.
endproperty
assert property (p_output_stable_while_stalled);
assert property (p_no_internal_output_gap);
endmoduleTrace one case
first accepted beat declares count=4,right_shift=1; frame data=[A,B,C,D] with correct last markeroutput beats=[D,A,B,C] with first/last metadata on the proper endpointsShift one modulo four rotates the snapshotted legal frame right and every beat is compared only on an output handshake.
Requirements
- Use frame queues assembled only from input handshakes and count/shift captured on the first accepted beat.
- Predict a right rotation by shift modulo count; count zero produces one all-zero success beat, while legal nonempty frames produce exactly count beats.
- Classify every first/last marker and accepted-beat count as bad-first, oversized-count, early-last, or late/extra; malformed input predicts one coded zero beat.
- Assert output stability under backpressure and no internal gap when the receiver remains ready.
- Treat input draining, transaction admission, reset epochs, and coverage as follow-up monitor/scoreboard design questions.
