Skip to question
asic.fyi
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
asic.fyi/Interview questions/Verify a cascading flit-collision resolver

Hardware interview practice

Verify a cascading flit-collision resolver

MediumUVM ComponentsSystemVerilog

Write a stack oracle and header check for a framed flit-collision resolver. A right-moving flit is marked R, a left-moving flit L, and only an R survivor followed by an incoming L can collide.

Try it in the question bankReason first. Then compare.

Keep this exact question selected while you check your answer and review the full solution.

Practice this question →
Reviewed example

Work through one case

Input
accepted flits=[R5,R3,L4] followed by last
Expected output
header survivor_count=1,error=0; sole survivor=R5 with last=1

L4 first eliminates the smaller opposing R3 and then loses to R5, exercising a two-level collision cascade while preserving survivor order.

What to cover

Requirements

  1. Use a stack oracle for one to 16 nonzero direction/magnitude flits, including arbitrary-depth collision cascades.
  2. Magnitude zero or a seventeenth flit predicts an error header with survivor_count zero.
  3. For a legal frame, require the header count to equal the ordered survivor queue length; an empty result has no data beats.
  4. Treat handshake assembly, header-before-data state, output beat checking, reset, and coverage as follow-up scoreboard work.
asic.fyi · Learn silicon end to end.info@asic.fyi