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Hardware interview practice

Upper Byte of a Register Does Not Update

EasyWaveform DebuggingSystemVerilog

A 16-bit write is accepted at C2. The address and data are correct, but only the low byte of the register changes on the following edge. Rule to apply: Byte 0 updates only when wstrb[0] is 1, and byte 1 updates only when wstrb[1] is 1. Which signal should be traced next to test whether the upper byte was masked?

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Practice this question →
Waveform for Upper Byte of a Register Does Not Update. Signals: wr_valid, wr_ready, wr_addr, wr_data, reg_0x20. Numbered markers identify sampled columns.
Read the sampled columns from left to right, then test each choice against the stated timing rule.
Choose one

Answer choices

  1. A. wstrb[1], the upper-byte write strobe.
  2. B. The read-channel ready signal.
  3. C. The interrupt output.
  4. D. The FIFO empty flag.
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