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Hardware interview practice

Track named bin hits

EasyReference ModelsSystemVerilog

Track hit status for named bins and report which required bins were missed at end of test.

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Reviewed example

Work through one case

Input
required={"reset","stall","full"}; hits={"reset","full","debug"}
Expected output
missed="stall"

The unrequired debug bin is ignored and the two required hits are removed from the final missing set.

What to cover

Requirements

  1. Support bins discovered by string name.
  2. Return NONE when every required bin was hit.
  3. Do not report unrequired bins.
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