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Separate CDR Frequency Acquisition from Phase Tracking

MediumTimingSystemVerilog

A binary-NRZ receiver uses a phase detector, loop filter, and phase interpolator. A local reference clock is available during startup, but the recovered sampling phase must follow the incoming serial data. The data can contain short runs without transitions. Which description of lock and tracking is correct?

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Answer choices

  1. A. The reference can pull the oscillator close to the expected bit rate during acquisition; data transitions then provide phase error for sampling, so transition density and loop bandwidth determine tracking, jitter tolerance, and behavior during transition-free runs.
  2. B. The reference clock determines every sampling edge after lock, so data transition density has no effect on the CDR.
  3. C. The loop filter removes all incoming jitter, so increasing its bandwidth always improves both jitter tracking and jitter rejection.
  4. D. The CDR can infer unlimited phase information from a constant run of zeros or ones and therefore needs neither coding limits nor holdover behavior.
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