Hardware interview practice
Resettable progress watchdog
Start a cycle-based watchdog that raises a fatal error after timeout_cycles sampled clock edges without progress. The testbench increments a monotonic progress counter whenever useful work completes.
Reviewed example
Work through one case
Input
timeout_cycles=5; progress_count increments at cycles 3 and 7, then stays unchanged through cycles 8..12Expected output
each increment restarts the window; fatal timeout occurs after the five quiet samples at cycles 8..12The checker samples after nonblocking assignments. An increment visible on the fifth sample is legal; otherwise that sample completes the timeout window.
What to cover
Requirements
- Run without blocking the caller.
- Initialize the monotonic progress counter before the watchdog starts.
- Treat timeout_cycles equal to zero as an immediate timeout without sampling a clock edge.
- Restart the full window whenever the sampled progress counter changes.
- Sample after nonblocking assignments so progress visible on the final allowed edge prevents a timeout.