Hardware interview practice
Rebudget a Channel from 2 to 3 GHz
A single-data-bit interface raises its symbol rate from 2.0 to 3.0 Gsym/s on the same package and board. Its unit interval falls from 500 ps to about 333 ps, and the current 2 GHz eye has limited margin. Which engineering response is most complete?
Choose one
Answer choices
- A. Increase transmitter drive strength to maximum; stronger drive always removes reflection, crosstalk, jitter, and power-noise problems simultaneously.
- B. Rebuild the timing/voltage eye budget at 333 ps using package-board-channel models and measurements; include insertion/return loss, discontinuities, crosstalk, ISI, jitter, simultaneous-switching noise, and PVT, then tune impedance, topology, placement, termination/ODT, drive/slew, equalization, and training and validate the final eye and BER.
- C. Check only the ideal clock period in RTL simulation because package, connector, and board effects begin above the digital sampling frequency and cannot alter the eye.
- D. Scale every existing timing margin by 2/3 and declare the channel valid because trace impedance does not depend on frequency.