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Order the Steps of a Differential SRAM Access

EasyMemory SystemsSystemVerilog

A conventional six-transistor SRAM column has complementary bit lines BL and BLB, a word line, a differential sense amplifier, and write drivers. Which read-and-write description is correct?

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Answer choices

  1. A. A read intentionally destroys the six-transistor cell value, so every SRAM read must be followed by a refresh write.
  2. B. Both operations select every word line in the row decoder and use the column decoder to prevent unselected cells from changing.
  3. C. For a read, precharge/equalize the bit lines, release precharge, assert the selected word line, and sense the small differential without flipping the cell. For a write, drive BL/BLB to opposite values strongly enough to overwrite the cell while its word line is active.
  4. D. For a read, force BL and BLB to opposite full-swing values before raising the word line; for a write, leave both bit lines precharged and only enable the sense amplifier.
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