Skip to question
asic.fyi
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
asic.fyi/Interview questions/Non-blocking global timeout

Hardware interview practice

Non-blocking global timeout

MediumTemporal ChecksSystemVerilog

Start a background timer that ends the test after a fixed number of clock cycles.

Try it in the question bankReason first. Then compare.

Keep this exact question selected while you check your answer and review the full solution.

Practice this question →
Reviewed example

Work through one case

Input
start global_timeout(name="smoke",cycles=50)
Expected output
caller returns immediately; detached timer reports smoke fatal after 50 positive edges

The forked background branch counts clock cycles without blocking test setup and identifies its configured timer in the failure.

What to cover

Requirements

  1. Do not block the caller.
  2. Count positive clock edges.
  3. Include the timer name and cycle count in the fatal message.
asic.fyi · Learn silicon end to end.info@asic.fyi