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Match uninitialized values to their data types

EasySystemVerilogSystemVerilog

At time zero, none of four declarations has an explicit initializer or driver. Which mapping of default values is correct?

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Answer choices

  1. A. bit=X, int=X, logic=0, wire=0
  2. B. All four values are 0
  3. C. All four values are X
  4. D. bit=0, int=0, logic=X, undriven wire=Z
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