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Q005FreeSystemVerilog

Map packed words to unpacked bytes

Difficulty
Easy
Topic
Bit Manipulation
Language
SV
Interview prompt

Question

Split a 32-bit packed word into four unpacked bytes using little-endian byte lanes, then rebuild the original word.

Thirty-two-bit word A1B2C3D4 mapped from packed bit slices to little-endian unpacked byte indices and rebuilt
Indexed part-selects map bits 7 through 0 to bytes[0] through bits 31 through 24 to bytes[3], then reconstruct the original word.
Candidate starting point

Implementation scaffold

function automatic void split_and_rebuild_le(
  input logic [31:0] word,
  output logic [7:0] bytes [0:3],
  output logic [31:0] rebuilt
);
  // TODO: implement.
endfunction
Reviewed example

Trace one case

Input
word = 32'hA1B2_C3D4
Expected output
bytes[0:3] = [D4, C3, B2, A1]; rebuilt_word = 32'hA1B2_C3D4

Little-endian lane zero is word[7:0], and the inverse indexed part-select mapping reproduces every source bit.

What to cover

Requirements

  1. Define byte 0 as word[7:0].
  2. Use indexed part-selects rather than an implicit array assignment.
  3. Rebuilding the word must reproduce every input bit.
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