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Q090·Free·SystemVerilog

Increment a four-digit BCD counter

Difficulty
Medium
Topic
RTL Design
Language
SV
Interview prompt

Question

Accept four valid binary-coded decimal (BCD) digits, add one without converting the packed value to binary, and return a stallable ready/valid response. Wrap 9999 to 0000 and flag the wrap.

Candidate starting point

Implementation scaffold

module bcd_incrementer (
  input  logic       clk,
  input  logic       rst_n,
  input  logic       in_valid,
  output logic       in_ready,
  input  logic [3:0] d3, d2, d1, d0,
  output logic       out_valid,
  input  logic       out_ready,
  output logic [3:0] q3, q2, q1, q0,
  output logic       carry_out
);
  logic [3:0] next3, next2, next1, next0;
  logic next_carry;

  always_comb begin : decimal_successor
    // TODO: Implement decimal_successor using the supplied state and interface.
  end

  assign in_ready = !out_valid || out_ready;

  always_ff @(posedge clk) begin : elastic_response
    // TODO: Implement elastic_response using the supplied state and interface.
  end
endmodule
Reviewed example

Trace one case

Input
accepted BCD values 1999, then 9999; stall the second response
Expected output
1999 -> 2000 carry_out=0; 9999 -> 0000 carry_out=1, held stable while stalled

Decimal carry propagates across trailing nines, and the all-nine case wraps all four digits with one carry flag.

What to cover

Requirements

  1. Treat each input digit as a decimal value from 0 through 9.
  2. Propagate decimal carry across any run of trailing nines.
  3. Create exactly one output transaction for every accepted input transaction.
  4. Hold all result digits and carry_out stable while out_valid is asserted and out_ready is low.
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RTL Logic and State

Review combinational logic, sequential state, counters, arithmetic, and finite-state machines.

  • RTL Design
  • BCD
  • Ready/valid
  • Carry propagation
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