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asic.fyi

Hardware interview practice

Find a target-sum operand pair

MediumRTL DatapathsSystemVerilog

Design a bounded operand-bank unit that finds two distinct valid entries whose unsigned sum equals a target. Return the lexicographically earliest pair of indices.

Upper-triangle operand-pair matrix showing two pairs that sum to nine and a priority encoder selecting indices zero and one.
Evaluate only pairs with the first index below the second, then apply deterministic lexicographic priority.
Reviewed example

Work through one case

Input
W=4; valid values by index=[2,7,4,5]; target=9
Expected output
found=1; idx_a=0; idx_b=1

Pairs (0,1) and (2,3) both sum to nine in W+1 bits, so lexicographic priority selects the lower first index.

What to cover

Requirements

  1. Support a parameterized bank with at least two entries and return idx_a < idx_b.
  2. Add in W+1 bits so W-bit wraparound cannot create a false match.
  3. Capture a request only while idle, pulse done for one cycle, and return zero indices when no pair exists.
  4. When several pairs match, choose the lowest idx_a and then the lowest idx_b.