Skip to question
asic.fyi
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
asic.fyi/Interview questions/Factory paths for objects

Hardware interview practice

Factory paths for objects

MediumUVM ComponentsSystemVerilog

Inside agent uvm_test_top.env.a0, a non-component configuration object is created as shown. Which full instance path should an object instance override normally target?

Try it in the question bankReason first. Then compare.

Keep this exact question selected while you check your answer and review the full solution.

Practice this question →
Starting point

Question code

cfg = base_cfg::type_id::create("cfg", this);
Choose one

Answer choices

  1. A. cfg, because uvm_object has no hierarchical name
  2. B. uvm_test_top.env.a0.cfg, because factory context combines the parent component path and requested object name
  3. C. uvm_test_top.env.a0, because the object's requested name is ignored
  4. D. base_cfg::cfg, because object overrides use type scope rather than instance scope
Continue practicing

Related questions

UVM ComponentsFactory type overrides→UVM ComponentsFactory instance overrides→
asic.fyi · Learn silicon end to end.info@asic.fyi