Skip to question
SystemVerilogDesignVerificationFirmwareArchitectureASIC Interview Questions→
/Interview questions/Direct Programming Interface (DPI) 4-state data mapping

Q148·Free·Design Verification

Direct Programming Interface (DPI) 4-state data mapping

Difficulty
Medium
Topic
Verification Utilities
Language
SV
Interview prompt

Question

A C model must distinguish 0, 1, X, and Z for every bit of a 32-bit bus. Which SystemVerilog Direct Programming Interface (DPI) boundary choice preserves that information?

Provided context

Code to inspect

// SystemVerilog declaration
import "DPI-C" function void inspect_bus(
  input logic [31:0] bus
);

// Matching C declaration from svdpi.h
// void inspect_bus(const svLogicVecVal* bus);
Choose one

Answer choices

  1. A. Use bit [31:0] and an svBitVecVal representation; X and Z are preserved
  2. B. Use logic [31:0] and an svLogicVecVal representation carrying value and unknown-state information
  3. C. Use int unsigned; all four states are encoded automatically in its numeric value
  4. D. Use real and reinterpret its mantissa as four-state bits
Exact question handoffPractice Q148

Solve it in the question bank, keep your progress, and reveal the reviewed solution when your access allows.

Open in question bank →
Solution accessEach time you open this Solution, one Practice Credit is used; it is not permanently unlocked. Premium Solution content also uses one credit per opening.
Continue learning

Special Types and Conversion

Review enums, strings, casts, packing, streaming, DPI values, and representation changes.

  • Verification Utilities
  • SystemVerilog
  • DPI/C interoperability
Special Types and Conversion →
Continue practicing

Related questions

Q342 · Verification UtilitiesDirect Programming Interface (DPI) importsEasyP→Q613 · Verification UtilitiesDetect X or Z in valid dataEasyP→Q003 · SystemVerilog4-state data typesEasy→Q383 · FirmwareCheck a cryptographic stream with C-DPIHardP→Q326 · SystemVerilog & UVMMatch out-of-order analysis streams by transaction IDHardP→
ASIC.FYI · Learn silicon end to end.info@asic.fyi