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Config_db build-time precedence

MediumUVM ComponentsSystemVerilog

During build, the test sets mode=1 for env.*. Later, in agent a0's build_phase, a0 sets mode=2 for itself and then gets mode. Both settings match. Under mainstream UVM build-time precedence, which value wins?

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Question code

// In test::build_phase
uvm_config_db#(int)::set(this, "env.*", "mode", 1);

// Later, in a0::build_phase
uvm_config_db#(int)::set(this, "", "mode", 2);
void'(uvm_config_db#(int)::get(this, "", "mode", mode));
Choose one

Answer choices

  1. A. 2, because the most recent set always wins regardless of phase or hierarchy
  2. B. 1, because build-time settings from higher hierarchy levels have higher precedence
  3. C. 2, because an exact path always outranks any wildcard
  4. D. The get must fail because two resources match
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