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Hardware interview practice

Classify an address range

EasyVerification UtilitiesSystemVerilog

Return LOW for [0:16], MED for [17:127], HIGH for [128:256], and OUT otherwise.

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Reviewed example

Work through one case

Input
unsigned addresses=[0,16,17,127,128,256,257]
Expected output
classes=[LOW,LOW,MED,MED,HIGH,HIGH,OUT]

Both endpoints of each legal interval are inclusive, adjacent class boundaries have no gap or overlap, and 257 is above the highest legal address.

What to cover

Requirements

  1. Treat all interval endpoints as inclusive.
  2. Represent OUT explicitly.
  3. Avoid gaps or overlaps.
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