Q061FreeDesign Verification

Check delayed and reordered memory writes

Difficulty: Medium
Topic: Reference Models
Language: SV

Interview prompt

Question

Compare authoritative expected memory writes with delayed or reordered DUT writes. Every expected address and data pair must receive one matching DUT write within a bounded number of cycles. For each cycle, record its expected writes and process all DUT observations before calling tick() once. The tick advances the counter and expires unmatched writes whose age reaches timeout; use a fixed positive timeout. Callbacks are serialized, and the total number of reports in one checker lifetime is at most 2^31 - 1. Each tick advances exactly one cycle; 32-bit subtraction measures age across counter wrap. Supported checker storage is at most 2,147,483,647 retained expectation objects in total at any time. The caller honors that storage premise before admitting another golden_write; it introduces no DUT overflow-reporting behavior.

Candidate starting point

Implementation scaffold

class MemoryEventualityChecker;
  typedef struct {
    int data;
    int unsigned born;
  } expected_t;

  expected_t pending[longint][$];
  int unsigned cycle = 0;
  local int unsigned timeout;
  int errors = 0;

  function new(int unsigned timeout = 100);
    if (timeout == 0) $fatal(1, "timeout must be positive");
    this.timeout = timeout;
  endfunction

  function void golden_write(longint addr, int data);
    // Implement here: golden_write.
  endfunction

  function void dut_write(longint addr, int data);
    // Implement here: dut_write.
  endfunction

  function void tick();
    longint empty_addr[$];
    // Implement here: tick.
  endfunction

  function int error_count();
    return errors;
  endfunction

  function void end_of_test_check();
    // Implement here: end_of_test_check.
  endfunction
endclass

Reviewed example

Trace one case

Input

expect write (0x100,0xAA) at cycle 0 and (0x200,0xBB) at cycle 1; DUT writes them reversed at cycles 3 and 4

Expected output

both writes match; no unexpected, expired, or end-of-test entries

Matching uses address and data rather than arrival order, while both observed delays remain within the configured bound.

What to cover

Requirements

Record each expected write with its arrival cycle.
Match a DUT write to one unmatched expectation with the same address and data.
Report unexpected DUT writes, expired expectations, and unmatched end-of-test entries.
Allow matching order to differ from expected-write order.

Continue practicing

Q179 · Reference ModelsExpire memory expectations without full scansHard Q465 · Reference ModelsCheck arbitrarily reordered packetsMediumP Q208 · Reference ModelsRelease reordered responses in request orderHardP Q033 · Reference ModelsMatch out-of-order packets by IDMedium Q053 · Reference ModelsOut-of-order scoreboard matchingMedium

class MemoryEventualityChecker; typedef struct { int data; int unsigned born; } expected_t; expected_t pending[longint][$]; int unsigned cycle = 0; local int unsigned timeout; int errors = 0; function new(int unsigned timeout = 100); if (timeout == 0) $fatal(1, "timeout must be positive"); this.timeout = timeout; endfunction function void golden_write(longint addr, int data); // Implement here: golden_write. endfunction function void dut_write(longint addr, int data); // Implement here: dut_write. endfunction function void tick(); longint empty_addr[$]; // Implement here: tick. endfunction function int error_count(); return errors; endfunction function void end_of_test_check(); // Implement here: end_of_test_check. endfunction endclass

Question

Implementation scaffold

Trace one case

Requirements

Related questions

Question

Implementation scaffold

Trace one case

Requirements

Related questions