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Build Traceable Verification Items from a Specification

MediumFunctional CoverageSystemVerilog

A DMA specification defines normal transfers, alignment limits, resets, backpressure, error responses, interrupt timing, and a throughput target. Which plan best supports measurable signoff?

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Answer choices

  1. A. Write one long random test with no feature labels; if it runs overnight without a fatal message, mark every requirement verified.
  2. B. Copy section headings into a checklist but omit expected results so each engineer can decide informally whether a waveform looks correct.
  3. C. Give each requirement an identifier and link it to directed and constrained-random tests, assertions, checkers, functional coverpoints/crosses, and expected results; include boundaries, illegal behavior, reset and concurrency, performance, and maintain reverse links from failures and coverage holes back to the requirement.
  4. D. Use statement and branch coverage as the only signoff measure because reaching every RTL line proves every specified behavior and error response.
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