Skip to question

Q047FreeSystemVerilog

Bound the promise of a two-flop synchronizer

Difficulty
Easy
Topic
Clock Domain Crossing
Language
SV
Interview prompt

Question

A slowly changing one-bit status crosses into an unrelated destination clock domain. Which statement accurately describes a two-flop synchronizer?

Choose one

Answer choices

  1. A. It guarantees zero probability of metastability.
  2. B. It reduces the chance that metastability reaches destination logic for a single-bit level.
  3. C. It is appropriate for an arbitrary changing data bus.
  4. D. It preserves every source pulse regardless of width.
Continue practicing
Q721 · Clock Domain CrossingPurpose of a two-flop synchronizerEasyPQ004 · Clock Domain CrossingChoose a safe clock-domain crossing strategyMediumQ036 · Clock Domain CrossingModel a CDC-safe asynchronous FIFOHard