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Hardware interview practice

Arbitrate fairly between two requesters

MediumArbitersSystemVerilog

Design a two-requester round-robin arbiter and a requester BFM. When both requests remain asserted, grants must alternate; when only one requests, it may be granted every cycle.

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Reviewed example

Work through one case

Input
req0=req1=1 for four completed service cycles; reset priority starts at requester 0
Expected output
grants=01,10,01,10

Both active requesters alternate, and priority rotates only after each grant is sampled as completed service.

What to cover

Requirements

  1. Produce at most one grant per cycle and never grant an inactive requester.
  2. Update priority only after a grant represents a completed unit of service.
  3. A continuously asserted requester must not starve.
  4. The BFM must hold request until its grant is sampled, then release it cleanly.
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Related questions

Reference ModelsModel a round-robin arbiter→RTL DesignFour-requester round-robin arbiter→
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