Skip to question
asic.fyi
DesignVerificationSystemVerilogFirmwareArchitectureInterviews
asic.fyi/Interview questions/Measure latency to the next higher sample

Hardware interview practice

Measure latency to the next higher sample

MediumStreaming AlgorithmsSystemVerilog

For every accepted temperature in a bounded trace, compute the distance to the first later sample with a strictly greater value, or zero when no such sample exists.

Try it in the question bankReason first. Then compare.

Keep this exact question selected while you check your answer and review the full solution.

Practice this question →
Reviewed example

Work through one case

Input
temperature frame = [73, 74, 75, 71, 69, 72, 76, 73]
Expected output
distance = [1, 1, 4, 2, 1, 1, 0, 0]

The decreasing stack resolves each index when its first strictly higher later sample arrives; equal values would remain pending.

What to cover

Requirements

  1. Support frames of 1 to 32 unsigned eight-bit temperatures; equal values are not greater.
  2. Use fixed stack and result storage, and serialize multiple pops caused by one new sample.
  3. Do not accept a new sample until all stack work for the retained sample is complete.
  4. Emit results in original index order only after the frame ends.
  5. Hold index, distance, and last stable while output is stalled.
asic.fyi · Learn silicon end to end.info@asic.fyi